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GIC-DLC: Differentiable Logic Circuits for Hardware-Friendly Grayscale Image Compression

2026-01-20 16:29:23
Till Aczel, David F. Jenny, Simon B\"uhrer, Andreas Plesner, Antonio Di Maio, Roger Wattenhofer

Abstract

Neural image codecs achieve higher compression ratios than traditional hand-crafted methods such as PNG or JPEG-XL, but often incur substantial computational overhead, limiting their deployment on energy-constrained devices such as smartphones, cameras, and drones. We propose Grayscale Image Compression with Differentiable Logic Circuits (GIC-DLC), a hardware-aware codec where we train lookup tables to combine the flexibility of neural networks with the efficiency of Boolean operations. Experiments on grayscale benchmark datasets show that GIC-DLC outperforms traditional codecs in compression efficiency while allowing substantial reductions in energy consumption and latency. These results demonstrate that learned compression can be hardware-friendly, offering a promising direction for low-power image compression on edge devices.

Abstract (translated)

神经图像编解码器比传统的手工设计方法(如PNG或JPEG-XL)实现了更高的压缩比率,但通常会带来显著的计算开销,限制了它们在智能手机、相机和无人机等能量受限设备上的部署。我们提出了灰度图像压缩与可微逻辑电路 (GIC-DLC),这是一种硬件感知编解码器,我们在其中训练查找表以结合神经网络的灵活性和布尔运算的效率。在灰度基准数据集上的实验表明,GIC-DLC 在压缩效率上超越了传统编解码器,并且能够在很大程度上减少能量消耗和延迟。这些结果证明了学习到的压缩技术可以是硬件友好的,为边缘设备上的低功耗图像压缩提供了一个有前景的方向。

URL

https://arxiv.org/abs/2601.14130

PDF

https://arxiv.org/pdf/2601.14130.pdf


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